Who We Are
NEX Architecture is designing and building new IP for next generation Intel IPU and FNICs to enable programmability of the network data plane at high performance.
Who You Are
Your responsibilities are as follows, but not limited to:
You will work with architects and RTL designers to understand the architecture and programming abstractions.
You will help to improve the software behavior model of the architecture by building out statistics collection, debugging tools, and testing infrastructure.
You will also help to explore techniques to compile programs onto the architecture as well as to prototype new data plane programs.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications
Must be pursuing a Bachelor’s Degree in Electrical Engineering, Computer Science, or Data Science.
Preferred Qualifications
Knowledge in C++ development and testing
Knowledge in HW architecture design principles
Knowledge in Data center networking
Knowledge in RTL testing and Verilator
Knowledge in Discrete event simulation
Knowledge in SAT solvers
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.