Minimum qualifications:
- Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.
- 5 years of experience in test engineering or product engineering.
- Experience in ASIC or SoC DFT test development, bring-up, or debug for NPI prototypes or High Volume Manufacturing.
Preferred qualifications:
- Master's degree in Computer Science, Electrical Engineering, or related technical field, or equivalent practical experience.
- 10 years of experience in test engineering, product engineering, and/or silicon quality/reliability.
- Experience with Scan/ATPG test development and/or Memory BIST test development and repair implementation.
- Experience testing IPs such as PLLs, PVT sensors, temperature sensors, PMRO, and eFuse.
- Familiarity with Automatic Test Equipment (ATE) from Advantest and Teradyne, e.g., V93000, 6007, UltraFlex, Titan, etc.
About the job
Google’s data centers are some of the most advanced in the world. In this role, you will help build the SoCs that power these data centers by driving development of comprehensive ATE test solutions for high volume manufacturing. You'll create silicon and follow it into the field to close the loop back to design and test for the next generations of chips.
You'll help to integrate SoC technologies into devices and drive ATE manufacturing testing to validate performance and screen bad devices. You will work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
You'll help to integrate SoC technologies into devices and drive ATE manufacturing testing to validate performance and screen bad devices. You will work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs.Responsibilities
- Develop and drive implementation of silicon test requirements with internal design teams and external vendors.
- Participate in developing and executing strategies for SoC Product NPI, bring-up, verification, characterization, and qualification support, including bench test, troubleshooting, test coverage optimization, new product DPPM correlation, and product correlation between system and ATE.
- Leverage ATE test experience and expertise to drive quality improvements.
- Collaborate with design, DFT, and quality teams to drive best practices for post-silicon testing.
- Provide back-stop support for chip production, including test program upgrade and release procedures, volume data analytics, test time reduction, yield improvement, and RMA analysis.
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