Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
- 5 years of experience with bench, high-volume manufacturing (HVM) system level test, or hardware testing systems, test, and flow development.
- Experience with hardware, PCBA, ASIC, or SoC prototype bring-up, debug, functional verification, or testing.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
- 10 years of industry experience with system level test and/or system validation.
- Experience implementing secure manufacturing solutions including provisioning, eFuse and programming, lifecycle management, and SOC security.
- Proficiency with Linux/Unix.
- Proficiency in C#, NET Framework, C/C++, Perl, or Python.
- Knowledge of CPU architecture, CPU boot process, kernel, and CPU performance.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As an ASIC and SoC System Level Test Engineer, you will help to integrate SoC technologies into high performance computing products. You'll develop and automate system-level manufacturing test of SoC to validate performance and screen out bad devices.
You'll participate in all aspects of system level test and product engineering activities. You will work with ASIC Architecture, Design, and Pre-silicon SoC Verification teams to define test methodologies and implement manufacturing solutions.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Specify, design, and validate fully automated System Level Test (SLT) hardware and software, and work with cross-functional teams to implement a successful SLT solution to deliver high-quality products.
- Participate in SLT system requirements definition, development, and system bringup at both NPI labs and High Volume Manufacturing (HVM) OSATs.
- Work with hardware and software software teams to evaluate functional device yield and performance across various operating conditions, characterize hardware/software interaction, and develop effective production screens to reduce Defective Parts per Million (DPPM).
- Collaborate with production sustaining teams for test program and flow updates, lot disposition, test time reduction, yield improvement, analysis, etc.
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