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Job Descrption

Meta Reality Lab is the world leader in the design of virtual and augmented reality systems. Come work alongside expert engineers and research scientists to create the technology that makes VR pervasive and universal. Join the adventure of a lifetime as we make science fiction real and change the world.

The Display Architecture Team within the VR organization is seeking a Display Algorithm Architect to lead the development of Meta’s proprietary display IP for VR displays. As a member of the VR Display Team, the successful candidate will be working closely with Display Driver IC (DDIC) and pixel pipeline engineers, Visual Quality team, and DDIC vendors to design, evaluate performance, and embed Meta’s proprietary visual quality IP within the vendor's DDIC or in SoC for future VR products. This role offers involvement in a mix of forward-looking and product-critical projects, and requires close collaboration with multiple teams within the Meta Reality Labs.Display Algorithm Architect Responsibilities

• Lead architecture and development of proprietary display IP for VR displays including owning the reference software model for the algorithms.
• Collaborate with DDIC pixel pipeline architects to optimize algorithms for optimal gate-count and timing.
• Collaborate with visual quality teams to evaluate performance.
• Collaborate with hardware prototyping teams to create hardware evaluation and platforms.
• Collaborate with the system and DDIC engineers to bring up and test the algorithms for production readiness.

Minimum Qualifications

• Masters Degree in Electrical Engineering, or Computer Engineering, or equivalent work experience.
• 12+ years of industry experience including 5+ years of technical leadership working with multiple internal and external teams.
• Prior experience with architecture and design of display IP such as sub-pixel rendering, foveation, Mura, burn-in compensation algorithms.
• Proficient in at least one programming language such as Matlab, Python or C++.
• Effective communication skills and a record of publications.

Preferred Qualifications

• Ph.D. in Electrical Engineering.
• Good understanding of the front-end digital design flow: RTL design, logic synthesis, timing verification.
• Good understanding of pixel pipeline for Displays and DDIC architecture.
• Experience with FPGA prototyping.
• Familiar with compression IP design such as DSC.

LocationsAbout Meta Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics. Meta is committed to providing reasonable support (called accommodations) in our recruiting processes for candidates with disabilities, long term conditions, mental health conditions or sincerely held religious beliefs, or who are neurodivergent or require pregnancy-related support. If you need support, please reach out to accommodations-ext@fb.com. US$204,000/year to US$281,000/year + bonus + equity + benefits

Individual pay is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base salary, Meta offers benefits. Learn more about benefits at Meta.

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